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  MP9928 4v - 60 v input , current mode , synchrono us step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 1 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. description the MP9928 is a high - voltage, synchronous step - down switching regulator controller that can directly step down voltages from up to 60 v. the MP9928 uses pwm current control architecture with accurate cycle - by - cycle current limit ing . it i s capable of driving dual n - channel mosfet switches . aam mode ( advanced a synchronous m ode ) enables n on- synchronous operation and pfm mode to optimize light load efficiency. the o perating frequency of MP9928 can be programmed by an external res istor or synchronized to an external clock for noise - sensitive applications. fault protection s are available includ ing a precision output over voltage protection (ovp) , output over current protection (ocp), and thermal shutdown. the mp992 8 is available in tssop20 - ep package and qfn - 20 ( 3 mmx 4 mm) package . features ? wide 4v to 60v operating i nput ran g e ? dual n - channel mosfet driver ? low dropout operation: max imum d uty c ycle at 99.5 % ? programmable f requency range : 100khz - 1000 khz ? 180o out - of - p hase s ynco ? external soft - start and pg pin ? s el ectable cycle - by - cycle current limit ? output over v oltage protection ? internal ldo with external ly power supply option ? programmable ccm and aam p ulse - s kipping m ode ? accuracy o ver t emp erature protection ? tssop20 - ep package and qfn - 20 ( 3 mm x4 mm) package a pplications ? pd power supply in poe system ? usb dedicated charging port (dcp) ? industrial control systems ? power supply for linear charger s all mps parts are lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit the mps website under q uality a ssurance. ?mps? and ?the future of analog ic technology? are r egistered t rademarks of monolithic power systems, inc. typical application MP9928 4-60v in vcc1 en/sync pg pgnd fb bg tg bst ss comp vout vin freq sense+ sw ccm/aam sense- sgnd vcc2 synco ilim
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 2 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. ordering information part number package top marking mp 9928 gf * tssop - 20 ep see below mp 9928 gl ** qfn - 20 (3mmx4mm) see below * f or tape & reel, add suffix ? z (e . g. mp 9928 g f ? z) * * for tape & reel, add suffix ? z (e . g. mp 9928g l ? z) top marking ( MP9928gf ) MP9928 : product code of mp 9928gf ; mp s : mps prefix; y y : year code; ww: week code: lll llllll : lot number; top marking ( MP9928 gl ) 9928 : product code of mp 9928g l ; mp: mps prefix; y: year code; w : week code: lll: lot number;
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 3 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. package reference top view top view synco 3 sense+ in en/sync comp vcc2 freq bg bst tg sense- 4 5 6 7 8 18 17 16 15 14 13 pgnd fb ss 2 19 20 1 sw sgnd vcc1 ccm/aam 9 10 ilim pg 12 11 bst en/sync tg in ccm/aam synco freq pg vcc1 vcc2 comp fb ss sgnd ilim bg pgnd sw sense+ sense- 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 tssop - 20 ep qfn - 20 (3mmx4mm) absolute maximum rat ings (1) input s upply v oltage ( v in ) ............... - 0.3v to 65v en / sync ....................................... - 0.3v to 50v sw ......................... - 0.3v ( - 4v for < 20 ns) to 65v bst - sw ...................................... - 0.3v to 6.5 v supply v oltage ( v cc1 ) ................. - 0.3v to 6.5 v external s upply v oltage ( v cc2 ) ..... - 0.3v to 1 5 v sense + / - ................................... - 0.3v to 28v differential s ense ( sense + to sense - ) ............ ................................................... - 0. 7 v to +0. 7 v tg .............................. v sw - 0.3v to v b s t + 0.3v bg .................................. - 0.3v to vcc1 + 0.3v all o ther p ins ............................... - 0 .3v to + 6.5 v continuous p ower d issipation ( t a = + 25 c) (2) tssop - 20 ep ........................................... 3.1 w qfn - 20 (3mmx4mm) ................................ . 2. 6 w junction t emperature .............................. . 150 c lead t emperature .................................... 260 c storage t emperature ................ - 65 c to + 1 75 c recommended operating conditions (3 ) supply v oltage ( v in ) ......................... 4 v to 60 v (4) output v oltage ( v out ) ................................ 24v supply v oltage for ( v cc2 ) .................. 5 v to 1 2 v operating j unction t emp . (t j ). ...- 40 c to +125 c thermal resistance ( 5 ) ja jc tssop - 20 ep ........................ 40 ....... 8 .... c/w qfn - 20 (3mmx4mm) ............. 48 ...... 1 0 ... c/w notes : 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), t he junction - to - ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max) - t a )/ ja . exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) uvlo_rising is 5v but uvlo_falling is lower than 4v, so input must be >5v for startup, and after start up MP9928 can work down to 4v input voltage. 5) measured on jesd51 - 7, 4 - layer pcb.
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 4 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. electrical character istics v in = 24 v, t j = - 40 c to 125 c , en = 2v, v ilimit = 75mv , unless otherwise noted. parameters symbol condition min typ max units input supply v in uvlo t hresho ld ( r ising) in uv _ r ising 4.5 5 v v in uvlo t hreshold (falling) in uv _ falling 3.7 3.95 v v in uvlo h ysteresis in u v _ hys 800 m v v in s upply c urrent with vcc2 bias i q _ vcc2 vcc2 = 12 v, e xternal bias 25 40 a v in s upply c urrent without vcc2 bias i q vcc2 = 0 , v fb = 0. 84 v , v aam = 5v, sense + = sense - = 0.3v 750 1000 a v in aam c urrent i q _ aam v aam =0 .6 v, v fb =0. 84 v , sense + = sense - = 0.3v 250 350 a v in s hutdown c urrent i shdn v en = 0v 0.5 3 a v cc regulator vcc1 r egulator o utput v oltage from v in vc c1 _ vin vin > 6v 5 v vcc1 re gulator l oad r egulation from v in load = 0 to 5 0ma, vcc2 floating or connects to gnd 1 3 % vcc1 r egulator o utput v oltage from vcc2 vcc1 _ vcc2 vcc2 > 6v 5 v vcc1 r egulator l oad r egulation from vcc2 load = 0 to 5 0ma, vcc2 = 12v 1 3 % vcc2 uvlo t hreshold ( r ising) vcc2 _ rising 4. 7 4. 92 v vcc2 uvlo t hreshold ( f alling ) vcc2 _ falling 4. 45 v vcc2 t hreshold h ysteresis vcc2 _ hys 250 mv vcc2 s upply c urrent i vcc2 v aam = 5v , v fb = 0.84v , vcc2 = 12v 800 1200 a v aam = 0 .6 v, v fb = 0. 84 v, vcc2 = 12v 200 300 a feedback (fb) feedback v oltage v fb 4v v in 60 v, t j =25 c 0. 7 92 0.8 00 0. 8 08 v 4v v in 60 v , t j = - 40 c to 1 25 c 0. 788 0.8 00 0.8 12 v feedback c urrent i fb v fb = 0.8 4 v 10 na enable ( en ) enable t hreshold ( r ising) v en _ rising 1.16 1.22 1.28 v enable t hreshold ( f alling ) v en _ falling 1.03 1.0 9 1.15 v enable t hreshold h ysteresis v en _ th 1 3 0 m v en i nput c urrent i en v en = 2v 2 a enable t urn - off d elay t off 10 15 s
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 5 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. electrical character istics (continued) v in = 24 v, t j = - 40 c to 125 c , en = 2v, v ilimit = 75mv , unless otherwise noted. parameters symbol condition min typ max units oscillator and sync operating f requency f sw r freq = 65k 240 300 360 khz foldback o perating f requency f sw _ foldback v fb = 0. 1v 50% f sw maximum p rogrammable f requency f sw h 1000 khz minimum p rogrammable f requency f sw l 100 khz sync /en f requency r ange f sync 100 1000 khz sync /en v oltage r ising t hreshold v sync _ rising 2 v sync /en v oltage f alling t hreshold v sync _ falling 0.35 v current sense current s ense c ommon m ode v oltage r ange v sense+/ - 0 24 v current l imit s ense v oltage v ilimit i lim = gnd , v sense+ = 3.3v 15 25 35 mv i lim = vcc1 , v sense+ = 3.3v 40 5 0 60 mv i lim = float , v sense+ = 3.3v 65 75 85 mv reverse c urrent l imit s ense v oltage v rev _ ilimit i lim = gnd, v sense+ = 3.3v 8 mv i lim = vcc1, v sense+ = 3.3v 17 i lim = float, v sense+ = 3.3v 24 valley c urrent l imit v val _ ilimit i lim = gnd , v sense+ = 3.3v 22.5 mv i lim = vcc1 , v sense+ = 3.3v 47.5 i lim = float , v sense+ = 3.3v 72.5 input c urrent of s ensor i sense v sense +/ - (cm) = 0v - 45 a v sense +/ - (cm) = 3.3 v 115 a v sense +/ - (cm) > 5 v 150 a soft start (ss) soft - s tart s ource c urrent i ss ss = 0.5v 2 4 6 a error amplifier error a mp t ransconductance g m v = 5mv 500 a/v error a mp o pen l oop dc g ain (6) a o 70 db er ror a mp s ink/ s ource c urrent i ea fb = 0.7/0.9v 30 a protection over - v oltage t hreshold v ov 110% 115 % 120% v fb over - v oltage h ysteresis v ov _ hys 10% v fb thermal s hutdown (7) 1 70 c thermal s hutdown h ysteresis (7) 20 c
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 6 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. electrical characte ristics (continued) v in = 24 v, t j = - 40 c to 125 c , en = 2v, v ilimit = 75mv , unless otherwise noted. parameters symbol condition min typ max units gate driver tg p ull - up r esistor r tg _ pullup source 20ma 2 tg p ull - down r esistor r tg _ pulldn sink 20ma 1 bg p ull - up r esistor r bg _ pullup s ource 20ma 3 bg p ull - down r esistor r bg _ pulldn sink 20ma 1 de ad t ime t dead c load = 3.3nf 60 ns tg m aximum d uty c ycle d max v fb = 0.7v 98 99.5 % tg m inimum o n t ime (7) t on _ min _ tg 92 ns b g m inimum o n t ime t on _ min _ bg 175 250 ns power good power g ood l ow v pg _ low i sink = 4ma 0.1 0.3 v p g r ising t hreshold pg vth _ rsing v out r ising 85% 90% 96.5% v fb v out f alling 101% 1 07 % 112.5% p g f alling t hreshold pg vth _ falling v out f alling 81% 87 % 92.5% v fb v out r ising 105 % 110 % 116.5% p g t hreshold h ysteresis pg vth _ hys 3 % v fb po wer g ood l eakage i pg _ lk pg = 5 v 2 a power g ood d elay t pg _ delay pg rising and falling 25 s aam /ccm aam o ut put c urrent i aam r freq = 65 k 9.2 a ccm r equired aam t hreshold v oltage v ccm _ th 2.3 v notes : 6) guarantee d by design , not tested. 7) guaranteed by characterization, not product ion tested .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 7 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. typical characteristics v in = 24 v, v out = 5 v , l = 4.7 h, t a = +25 c , unless otherwise noted .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 8 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. typical characteristics (continued) v in = 24v, v out = 5 v, l = 4.7h, t a = +25 c , unless otherwise noted .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 9 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. typical performance characteristics (continued) v in = 24v, v out = 5 v, l = 4.7h, t a = +25 c , unless otherwise noted .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 10 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. t ypical performance c haracteristics (continued) v in = 24 v, v out = 5 v , l = 4.7h , aam mode, t a = + 25 c , unless otherwise noted .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 11 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. typical performance characteristics (continued) v in = 24 v, v out = 5 v , l = 4.7h , aam mode, t a = + 25 c , unless otherwise noted .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 12 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. typical performance characteristics (continued) v in = 24 v, v out = 5 v , l = 4.7h , aam mode, t a = + 25 c , unless otherwise noted .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 13 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. pin functions tssop pin # qfn pin # name description 1 19 in input s upply. the MP9928 operates from a 4v to 60 v in put . c eramic capacitor is needed to prevent large voltage spikes from appearing at the input. 2 20 en/sync enable input. the threshold is 1.22v with 1 3 0mv of hysteresis , and it is used to implement an input under voltage lockout (uvlo) func tion externally. if an external sync clock is applied to this pin , internal clock will follow the sync frequency. 3 1 vcc2 external power supply for the internal vcc1 regulator . it will disable the power from v in as long as vcc2 is high e r than 4. 7 v. do not connect > 12v power supply to this pin . connecting vcc2 pin to external power supply will reduce power dissipation and thus increases efficiency. 4 2 vcc1 internal bias supply. decouple with a 1 f ceramic capacitor or greater ceramic capacitor . but t he capacitance should be no more than 4.7 f. 5 3 sgnd l ow noise signal ground reference. 6 4 ss soft - s tart control input. this pin is used to program the soft - start period with an external capacitor between ss to sgnd . 7 5 comp comp is used to compensate the regulation control loop. connect an rc network from comp to gnd to com pensate for the regulation control loop. 8 6 fb feedback. this is the input to the error amplifier. an external resistive divider connected between the output and gnd is compared to the internal +0.8v reference to set the regulation voltage. 9 7 ccm /aam continuous conduction mode/advanced asynchronous mode set pin . connect this pin to vcc1 pin or float can set the part operate s in ccm mode . connect ing an appropriate external resistor from this pin to gnd t o make aam at low level, can set the part operate s in aam. the aam voltage should be no less than 480mv. 10 8 f req connect a resistor between f req and gnd to set the switching frequency. 11 9 pg power g ood o utp ut . t he output of this pin is open drain. 12 10 ilim current s ense v oltage l imit s et. the voltage at this pin sets the nominal sense voltage at maximum output current . t here are three fixed options ( f loat, connect to vcc1 or connect to gnd.) 1 3 11 synco outputs a clock which are 180 out - of - phase with internal oscillator clock or external sy nchronize clock when part works in ccm or dcm(but not sleep mode) for dual channel co - pack. synco outputs dc voltage in other cases(sleep mode, low dropout mode , fault protections, etc.). 1 4 12 sense - negative input for the current s ense . the sensed indu ctor current limit threshold is determined by status of ilim pin . 1 5 13 sense + positive input for the current sense. the sensed inductor current limit threshold is determined by status of ilim pin . 1 6 14 pgnd power ground reference for the internal low side switch driver and the vcc1 regulator circuit. connect this pin directly to the negative terminal of the vcc1 decoupling capacitor.
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 14 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. pin functions (continued) tssop pin # qfn pin # name description 1 7 15 bg bottom gate d river output . connect this pin to the gate of the synchronous n - channel mosfet. 18 16 sw switch node. r eference for the v bst s upply and high current return s for bootstrapped switch. 19 17 tg top gate drive . the tg pin drives the gate o f the top n - channel mosfet. the tg driver draws power from the bst capacitor and returns to sw pin , providing a true ?oating drive to the top n - channel mosfet. 20 18 bst bootstrap. this pin is the positive power supply for the internal fl oating high side mosfet driver. connect a bypass capacitor between this pin and sw pin . a diode from vcc1 to this pin charge s the bst capacitor when the low side switch is off.
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 15 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. block diagram vcc regulator oscillator reference error amplifier control current limit comparator boost regulator hs driver ls driver fb p gnd sw bst vcc1 ccm/aam tg bg current sense amplifer sense+ sense- comp in freq vcc1 en/sync pg sgnd v pg vref 12 x 4 . 7 v vcc2 ilim synco ss ss vcc1 figure 1 : block diagram
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 16 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. operation overview the MP9928 is a high - performance , step down , synchronous dc / dc converter controlle r ic with a wide input range. it implements current mode , switching frequency programmable control architecture to regulate the ou t put voltag e with external n - channel mosfet switches . the MP9928 senses the voltage at fb pin . t he difference b etween the voltage on this pin and an internal 0.8v reference is ampli?ed to generate an error voltage on comp pin which is used as a threshold for the current sense comparator with a slope compensation ramp . under normal load condition , the controller operates in full pwm mode . at the beginning of each oscillator cycle, the top gate driver is enabled. t op gate turns on for a period determined by the duty cycle. when the top gate turns off, the bottom gate turns on after a dead time and stays on until the beginning of the next clock cycle . there is an optional power save mode for light load or n o load condition s , and see details in the following section . aam mode MP9928 employs aam mode functionalit y to optimize the efficiency during light - load or no - load conditions . this aam mode can be optional enabled when ccm/ a am pin is at a low level by connecting an appropriate resistor to gnd to make sure that v aam is no less than 480 mv . v aam (mv) = i aam ( a ) x r aam (k) w here , i aam is aam pin output current , it can be shown below. i aam ( a ) = 600 (mv) / r freq (k) r f req is the resistor from f req to sgnd , for given operating frequency , and it s value is shown in ? programmable switching frequency ? section . aam is disabled when ccm/ aam pin is floating or connected to vcc1 . if aam is enabled, the MP9928 will first ly enter non- synchronous operation as long as the inductor current approaches zero at l ight - load. if the load is further decrease d or even no load that make comp voltage below the voltage of ccm/ aam pin (v aam ) + 480mv , the MP9928 enters aam mode . in aa m mode , t he internal clock is reset every time when v comp crosses over ( v aam + 480mv) and the crosso ver time is taken as benchmark of the next clock . when the load increases and the dc value of v comp is higher than ( v aam + 480mv ) , the operation mode is dcm or ccm which has a constant switching frequency. aam mode ( aam = low ) inductor current t t t load decreased pwm mode ( aam = high ) inductor current t t t load decreased figure 2 : aam and pwm floating driv er and bootstrap charging the floating top gate driver is powered by an external bootstrap capacitor (c bst ), which is normally re fresh ed when the high - side mosfet (hs - fet) turns off. this floating driver has its own uvlo protection. this uvlo?s rising thr eshold is 3.05v with a hysteresis of 170 mv. vcc1 regulator and vcc2 power supply both high - side and low - side mosfet drivers and m ost of the internal circuitries are powered from the vcc1 regulator. an internal low dropout linear regulator supplies vcc1 power from vin , usually a 1 f to 4.7 f ceramic capacitor is recommended from vcc1 to gnd . if vcc2 pin is left open or connected to a voltage < 4. 4 5 v, an internal 5 v regulator supplies vcc 1 power from vin . if vcc2 is > 4.7v, the 5 v regulator is disabled and another 5v regulator is triggered that suppl ies vcc1 power from vcc2 . if 4.5v< vcc2 <5v , the 5v regulator is in dropout and vcc1 is approximately equal to vcc2 . when vcc2 is greater than 5v ( max . is 12v ), vcc1 is
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 17 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. regulated to 5v. using the vcc2 power supply allows the vcc1 power to be derived from a high - efficiency external source , such as one of the MP9928 ?s switching regulato r outputs . error amplifier the error amplifier compares the fb pin voltage with the internal 0.8v reference (ref) and outputs a current proportional to the difference between the two input voltage s . this output current is then used to charge or discharge the external compensation network to form the comp voltage, which is used to control the power mosfet current. adjusting the compensation network from comp pin to gnd could optimize the control lo op for good stability or fast transient response . current limit function there ar e three fixed options for current limit setting : when ilim connects to gnd, the current limit sense voltage is set to 25mv ; w hen ilim connect s to vcc1, the cur rent limit sense voltage is set to 50mv ; w hen ilim pin floats , the current limit sense voltage is set to 75mv . when the peak value of the inductor current exceeds the set current limit threshold, meanwhile , output voltage starts to drop until fb is 62.5 % of the reference. MP9928 enters hiccup mode to periodically restart the part . meanwhile, t he frequency would be lowered when fb < 0. 5 v . this protection m ode is especially useful when the output is dead - short ed to ground. the average short - circuit current is greatly reduced to alleviate the thermal issue s . the MP9928 exits the hiccup mode once the over - current condition is removed. low drop out operation at low dropout mode, t he MP9928 is designed to operate at hs max duty on mode as long as the voltage across bst - sw is greater than 3.05v , this improv es dropout. when the voltage from bst to sw drops below 3.05v , an under - voltage lockout (uvlo) circuit turns off the high - side mosfet (hs - fet) , and a t the same time, the low - si de mosfet (ls - fet) turns on to refresh the bst capacitor. after the bst capacitor voltage is re - charged, the hs - fet turns on again to regulate the output. since the bst capacitor voltage is greater than 3.0 5v , the hs - fet can remain on for more switching cycles than are required to refresh the bst capacitor, thus increasing the effective duty cycle of the switching regulator. the low dropout operation makes the MP9928 suitable for application such as automoti ve cold - crank. power good function the MP9928 includes an open - drain power good output that indicates whether the regulator ? s output is within about 10% of its nominal value. when the output voltage falls outside this range, the pg output is pulle d to low. it should be connected to a voltage source of no more than 5v through a resistor (e.g. , 100k ). the pg delay time is 25 s. pg pin has self - driving capability, if mp 9928 is off and pg pin is pulled up to another dc power source through a resistor, the pg pin can also be pulled low by self - driving circuit. soft s tart the soft start (ss) is im plemented to prevent the converter output voltage from overshooting during start up. when the chip starts, the internal circuitry generates a soft - start voltage ramp ing up from 0v to 0.8 v. when it is lower than the internal reference (ref), ss vol tage overrides ref , so the error amplifier uses ss voltage as the reference. when ss voltage is higher than ref, ref regains control. an external capacitor connected from ss to sgnd is charged from an internal 4 a current source , producing a ramped voltage. the soft - start time (t ss ) is set by the external ss capacitor and can be calculated by below formula : ( ) ( ) ( ) ( ) a i v v nf c ms t ss ref ss ss = where c ss is the external ss capacitor, v ref is the i nternal reference voltage (0.8v) , and i ss is the 4 a ss charge current. there is no internal ss capacitor. ss will be reset when a fault protection happened except for output over voltage protection . output over - v oltage p rotection MP9928 o utput voltage is monitored by fb voltage. if fb voltage is typically 1 0 % higher than the reference, it?ll trigger ovp . once it triggers ovp, MP9928 will go into discharge mode , the
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 18 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. hs - fet is turn ed off , and th e ls - fet is turned on and keeps on until the reverse current limit is triggered , a fter ls - fet is turned off, inductor current will increase to 0. the ls - fet will be turned on again next clock cycle. MP9928 works at discharge mode until the over - voltage condition is cleared. e nable the mp 9928 has a dedicated e nable control pin . it uses a bandgap generated precision threshold of 1. 22v . by pulling it high or low, the ic can be enabled or disabled. to disable the part, en /sync must be pulled low for at least 1 5s. tie en to v in through a resistor divider r 1 6 and r 17 to program th e v in start up threshold ( see f igure 3 ) . the en threshold is 1.08v (falling edge), so the v in falling uvlo threshold is 1.08v x ( 1+ r 1 6 /r 17 ). in high input design, en pin voltage should not be greater than 50v. en vin r16 r17 figure 3 : en resistor divider synchronize the MP9928 can be synchronized to an external clock rang e from 100khz up to 10 00khz through en/ sync pin . the internal clock rising edge is synchronized to the external clock rising edge. the pulse width (both on and off) of external clock signal should be no less than 100ns. under - voltage lockout under - voltage lockout (uvlo) is implemented to protect the chip from operating at insufficient inpu t supply voltage s . the MP9928 uvlo rising threshold is about 4.5 v while its falling threshold is a bout 3. 7 v. thermal protection the purpose of t hermal protection is to prevent damage in the ic by allowing exceptive current to flow and heati ng the ju n ction . the die temperature is internally monitored until the thermal limit is reached. when the silicon die temperature is higher than 1 7 0c, it shuts down the whole chip . when the temperature is lower than its lower threshold , typically 15 0c , the chip is enabled again. start - u p and shutdown if both v in and en are higher than their respective thresholds, the chip starts up . the reference block starts first, generating stable r efe rence voltage s and currents . and then t he internal regulator is enabled. the regulator provides stable supply for the remaining circuitry. three events can shut down the chip: en low, v in low and thermal shutdown. in the shutdown proced ure, the signal path is first ly blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subjected to this shutdown command. pre - b ias start - u p for MP9928, at startup, i f ss< fb , which means output has pre - bias voltage , neither tg n or bg would be turned on until ss is greater than fb.
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 19 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. application informat ion setting the output voltage the external resistor divider is used to set the o utput voltage . fb vout r8 r9 figure 4 : v out setting resistor if r 8 is determined , then r 9 can be calculated with below formula : 1 0.8v v r r out 8 9 ? = table 1 ? resistor selection for common output voltages v out (v) r 8 (k?) r 9 (k?) 3.3 37.4 (1%) 12 (1%) 5 63.4 (1%) 12 (1%) 12 169 (1%) 12 (1%) setting current sensing the MP9928 has three fixed options for current limit setting : w hen ilim pin is connect ed to gnd , the current sense voltage is set to 25mv ; w hen ilim pin is connect ed to vcc1, the current sen se voltage is set to 50mv and w hen ilim pin is float ing , the current limit sense voltage is set to 75mv . the current sense resistor , r sense , monitors the inductor current. its value is chosen based on the current limit threshold . t he relationship between the peak inductor current i pk and r sense is : ipk ilimit v r sense = (5) the t ypical values for r sense are in the range of 5 m to 50m . p rogrammable switching frequency there are a number of variables to consider when choosing the switching frequency. a h igh frequency will increase switching losses and gate charge losses , while a l ow er frequency requires more inductance and capacitance, which result s in larger real estate and also higher cost. it is a trade off between power loss and passive component size . additionally , i n noise - sensitive applications, the switching frequency should be out of a sensitive frequency ba nd. the MP9928 ?s frequency can be programmed from 100khz to 10 00khz with a resistor from f req to sgnd . the value of r f req for a given operating frequency can be calculated by : freq s 20000 r (k ) 1 f (khz) ?= ? to ge t f s = 500khz, set r freq to 39k . table 2 : frequency vs. resi s tor resistor ( k? ) frequency (khz) 65 300 39 500 19 1000 v cc regulator connection vcc1 can be power ed from bot h v in and vcc2 . if connecting vcc2 to an external power supply to improve the overall efficiency , this vcc2 sh ould be larg er than 4. 7 v but smaller than 12v . MP9928 internal v in c in ldo 4.7v v in c vcc ext . power supply vcc1 vcc2 figure 5 : v cc power f rom external supply if v out is higher than 4. 7 v but 12v , vcc2 can be connected to v out directly .
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 20 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. MP9928 internal i l r sense v out c o v in c in ldo 4 . 7 v v in c vcc vcc1 vcc2 figure 6 : v cc power f rom v out selecting the inductor an inductor with a dc current rating at least 25% higher than the maximum load current is reco mmended for most applications. a larger value inductor result s in less ripple current and a lower output ripple voltage. however, the larger value inductor has a larger physical size, higher series resistance, and lower saturation current. generally, c hoose the inductor ripple current approximately 30% of the maximum load current . t hen t he inductance value can be then be calculated by : out in out in l s v (v - v ) l v if = w here v out is the output voltage, v in is the input v oltage, f s is the switching frequency, and l i is the peak - to - peak inductor ripple current. the maximum inductor peak current is : l l(max) load i i =i + 2 w here , i l oad is the load current. input capacitor selection since the input capacitor absorbs the input switching current, it requires an adequate ripple current rating. the selection of the input capacitor is mainly based on its maximum ripple current capab ility. the rms value of the ripple current flowing through the input capacitor ca n be described as : out out rms load in in vv i =i (1- ) vv the worst - case condition occurs at v in = 2 v out , where i rms = i load /2 . so, the inp ut capacitor selected must be capable of handling this ripple current . output capacitor selection the output capacitor k eeps the output voltage ripple small and ensures regulation loop stability. the output capacitor impedance should be low at the switching frequency. the output voltage ripple can be estimated by : out out out esr s in s o vv 1 v 1r f l v 8f c ?? ?? = ? + ?? ?? ?? ?? w here c o is the output capacitance value and r esr is the equivalent series resistance (esr) value of the output capacitor. for tantalum or electrolytic capacitor application, the esr dominates the impedance at the switching frequency. so the above f ormula can be approximated as : out out out esr s in vv v 1r fl v ?? = ? ?? ?? compensation components the MP9928 employs current - mode control for easy compensation and fast transient response. the comp pin controls system stability and transient response. the comp pin is the output of the internal error amplifier. a series capacitor - resistor combination sets a pole - zero combination to control the control system?s characteristics. the dc gain of the volta ge feedback loop is : out fb o cs load vdc v v a g r a = where a o is the error - amplifier voltage gain 3000 v/v, g cs is the current - sense transconductance , 1 / ( 12x r sense ) ( a/v ) , and r load is the load resistor value.
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 21 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. comp r5 c6 c7 figure 7 : comp external compensation the system has two important poles: o ne from the compensation capacitor (c 6 ) and the output resistor of error amplifier and the other tone from th e output capacitor and the load resistor . these poles can be calculated by : o m p1 a c6 2 g f = load p2 r co 2 1 f = where g m is the error - amplifier trans conductance 500 a/v, and co is the output capacitor. the system has one important zero due to the compensation capacitor and the compensation resistor (r 5 ) . this zero is located at : r5 c6 2 1 f z1 = the system may have another significant zero if the output capacitor has a large capacitance or a high esr value . t his zero can be located at : esr esr r co 2 1 f = in this cas e, a third pole set by the compensation capacitor (c 7 ) and the compensation resistor can compensate for the effect of the esr zero. this pole is calculated by : r5 c7 2 1 f p3 = the goal of the compensation d esign is to shape the converter transfer function for a desired loop gain. the system crossover frequency where the feedback loop has unity gain is important , since l ower crossover frequencies result in slower line and load transient responses , and higher crossover frequencies lead to system instability. s et the crossover frequency to ~0.1f sw . f ollow the below steps to design the compensation: 1. choose r 5 to set the desired crossover frequency : fb out cs m c v v g g f co 2 r5 = where , f c is the desired crossover frequency. 2. choose c 6 to achieve the desired phase margin. for applications with typical inductor values, set the compensation zero (f z1 ) < 0.25 x f c to provide a sufficient phase margin. c 6 is then : c f r5 2 4 c6 > 3. c 7 is required if the esr zero of the output capacitor is located at <0.5f sw , or the following relationship is valid: 2 f r co 2 1 sw esr < if this is the case, use c 7 to set the pole (f p3 ) at the location of the esr zero. determine c 7 : r5 r co c7 esr = pcb layout considerations for a controller , the layout is alw ays an important step in design. a poor layout would result in reduced performance, emi problems, resistive loss and even system instability. following step would help to guarantee a good layout design: 1. i nput power loop between input capacitor, high - side mosfet and low - side mosfet should be as small as possible, sw tr a ce should be as possible as short and wide . at the same time, one small decoupling capacitor should be placed close to the ic?s in and gnd pins. 2. feedback loop should be far away from noise source such as sw trace, the feedback divider resistor should be as close as possible to fb and gnd pin.
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 22 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. 3. route the sensing traces (sense + , sense - ) in paired way with smallest closed area. avoid crossing noisy areas such as sw or high - side gate drive traces. pla ce the filter capacitor for the current sense signal as close to the ic pins as possible . 4. a short and wide type resistor is recommend for current sense. 5. vcc1 and vcc2 capacitors should be placed as close as possible to vcc1 pin and vcc2 pin. 6. layout the gat e drive traces as directly as possible. layout the forward and return traces close together, either running side by side or on top of each other on adjacent layers to minimize the inductance of the gate drive path. 7. the ground return of input/output capacit or should be tied close with large gnd copper area , and then connect to ic gnd pin through single point . 8. for heavy load, s uggest layout large copper, more layer s and more vias for heat sink . f ig ure 8 shows the recomme nded components place for mp 9928 in tssop20 - ep package . f ig ure 9 shows the recomme nded components place for mp 9928 in qfn 20 package . for the layout , the corresponding schematic can be found on figure 1 0 . r2 r1 r8 r9 r6 c7 c5 r5 c4 c3 c2a c2b l2 c11 r14 m1 m2 c8 c1c c1a c1b r6 r15 r20 r19 r12 r11 r7 vin gnd vout gnd d1 r13 bottom layer top layer via figure 8 : layout recommendation 2 c2a c2b l1 r6 r15 r20 r19 r12 r11 r1 r2 c3 c4 c5 c6 c7 r5 r8 r9 c1c d1 c8 r13 c11 r14 vout gnd bottom layer top layer via gnd vin r7 figu re 9 : layout recommendation design example below is a design example following the applicatio n guidelines for the following s pecifications: table 3 : design example v in 6 v to 60 v v out 5 v i out 0a - 7 a the typical application circuit for v out = 5 v in figure 10 shows the detailed application schematic, and it is the basis for the typical performance waveforms. this circuit can work down to 4v after startup, but v out may drop when v in is low due to maximum duty cycle limit. for more detailed device applicati ons, please refer to the related evaluation board datasheets
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 23 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. typical application circuits m1 m2 100k r2 37.4k r1 synco en/sync 680pf c6 51k r5 ns r6 ns c7 6v-60v 0.1uf c8 0.007 r7 63.4k r8 12k r9 vout 5v / 7a 4.7uh l2 4.7uf c1b 4.7uf c1a 10nf c5 0 r11 0 r12 d1 2.2 r13 0.47uf c1c 1uf c4 vcc2 0 r3 vout vout vcc1 37.4k r4 ns c9 10 r14 220pf c11 100k r15 vin vin ns r16 ns r17 ns c12 4.7uf c3 220uf c2b 22uf c2a vcc1 0 r19 0 r20 vin in freq en/sync synco ss ilim comp fb ccm/aam sgnd sense- sense+ pg vcc2 pgnd bg vcc1 sw tg bst u1 MP9928 figure 10 : application circuit for 5v output m1 m2 100k r2 37.4 k r1 synco en/sync 220pf c6 10k r5 ns r6 82pf c7 13v- 60v 0.1uf c8 0.007 r7 169k r8 12k r9 vout 12v 15uh l2 4.7uf c1b 4.7uf c1a 10nf c5 0 r11 0 r12 d1 2.2 r13 0.47 uf c1c 1uf c4 vcc2 0 r3 vout vout vcc1 37.4k r4 ns c9 10 r14 220pf c11 100k r15 vin vin ns r16 ns r17 ns c12 4.7uf c3 220uf c2b 22uf c2a vcc1 0 r19 0 r20 vin in freq en/sync synco ss ilim comp fb ccm/aam sgnd sense- sense+ pg vcc2 pgnd bg vcc1 sw tg bst u1 MP9928 r10 0 c10 150pf figure 1 1 : application circuit for 12v output
MP9928 ?4v to 60v synchronous step - down controller MP9928 rev. 1 .0 www.monolithicpower.com 24 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. package information tssop - 20 ep note : 1 ) all dimensions are in millimeters . 2 ) package length does not include mold flash , protrusion or gate burr . 3 ) package width does not include interlead flash or protrusion . 4 ) lead coplanarity ( bottom of leads after forming ) shall be 0 . 10 millimeters max . 5 ) drawing conforms to jedec mo - 153 , variation act . 6 ) drawing is not to scale . 0 . 19 0 . 30 6 . 40 6 . 60 seating plane 0 . 65 bsc pin 1 id 4 . 30 4 . 50 6 . 20 6 . 60 1 10 11 20 0 . 80 1 . 05 1 . 20 max 0 . 00 0 . 15 top view front view side view 0 . 09 0 . 20 bottom view 2 . 60 3 . 10 3 . 80 4 . 30 recommended land pattern 5 . 80 typ 1 . 60 typ 0 . 40 typ 0 . 65 bsc 3 . 20 typ 4 . 40 typ detail ?a ? 0 . 45 0 . 75 0 o - 8 o 0 . 25 bsc gauge plane see detail " a "
MP9928 ?4v to 60v synchronous step - down controller notice: the information in this do cument is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any sai d applications. MP9928 rev. 1 .0 www.monolithicpower.com 25 5/20/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps . all rights reserved. qfn - 20 (3mmx4mm) side view bottom view note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeters max. 4) jedec reference is mo-220. 5) drawing is not to scale. pin 1 id marking top view pin 1 id index area recommended land pattern pin 1 id see detail a detail a pin 1 id option a 0.30x45 typ. pin 1 id option b r0.20 typ.


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